Struct FeasibleRegisterAssignment 

pub struct FeasibleRegisterAssignment { /* private fields */ }

The Feasible Register Assignment problem.

Given a directed acyclic graph G = (V, A) where arcs represent data dependencies, K registers, and an assignment f: V → {0, …, K-1}, determine whether there exists a topological evaluation ordering such that no two simultaneously live values share the same register.

Representation

An arc (v, u) means vertex v depends on vertex u (i.e., u must be computed before v). Each variable represents a vertex, with domain {0, ..., n-1} giving its evaluation position (the config must be a valid permutation).

Example

use problemreductions::models::misc::FeasibleRegisterAssignment;
use problemreductions::{Problem, Solver, BruteForce};

// 4 vertices: v0 depends on v1 and v2, v1 depends on v3
let problem = FeasibleRegisterAssignment::new(
    4,
    vec![(0, 1), (0, 2), (1, 3)],
    2,
    vec![0, 1, 0, 0],
);
let solver = BruteForce::new();
let solution = solver.find_witness(&problem);
assert!(solution.is_some());

Implementations

impl FeasibleRegisterAssignment

pub fn new( num_vertices: usize, arcs: Vec<(usize, usize)>, num_registers: usize, assignment: Vec<usize>, ) -> Self

Create a new Feasible Register Assignment instance.

Panics

Panics if any arc index is out of bounds (>= num_vertices), if any arc is a self-loop, if the assignment length does not match num_vertices, or if any assignment value >= num_registers.

pub fn num_vertices(&self) -> usize

Get the number of vertices.

pub fn num_arcs(&self) -> usize

Get the number of arcs.

pub fn num_registers(&self) -> usize

Get the number of registers.

pub fn num_same_register_pairs(&self) -> usize

Count unordered vertex pairs that share a register.

pub fn arcs(&self) -> &[(usize, usize)]

Get the arcs.

pub fn assignment(&self) -> &[usize]

Get the register assignment.

pub fn is_feasible(&self, config: &[usize]) -> bool

Check whether the given config (position assignment) is feasible.

Returns true if the config is a valid permutation, respects topological ordering, and has no register conflicts.

Trait Implementations

impl Clone for FeasibleRegisterAssignment

fn clone(&self) -> FeasibleRegisterAssignment

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for FeasibleRegisterAssignment

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<'de> Deserialize<'de> for FeasibleRegisterAssignment

fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>

where D: Deserializer<'de>,

Deserialize this value from the given Serde deserializer.

impl Problem for FeasibleRegisterAssignment

const NAME: &'static str = "FeasibleRegisterAssignment"

Base name of this problem type (e.g., “MaximumIndependentSet”).

type Value = Or

The evaluation value type.

fn variant() -> Vec<(&'static str, &'static str)>

Returns variant attributes derived from type parameters.

fn dims(&self) -> Vec<usize>

Configuration space dimensions. Each entry is the cardinality of that variable.

fn evaluate(&self, config: &[usize]) -> Or

Evaluate the problem on a configuration.

fn num_variables(&self) -> usize

Number of variables (derived from dims).

fn problem_type() -> ProblemType

Look up this problem’s catalog entry.

impl ReduceTo<FeasibleRegisterAssignment> for KSatisfiability<K3>

type Result = Reduction3SATToFeasibleRegisterAssignment

The reduction result type.

fn reduce_to(&self) -> Self::Result

Reduce this problem to the target problem type.

impl ReduceTo<ILP<i32>> for FeasibleRegisterAssignment

type Result = ReductionFeasibleRegisterAssignmentToILP

The reduction result type.

fn reduce_to(&self) -> Self::Result

Reduce this problem to the target problem type.

impl Serialize for FeasibleRegisterAssignment

fn serialize<__S>(&self, __serializer: __S) -> Result<__S::Ok, __S::Error>

where __S: Serializer,

Serialize this value into the given Serde serializer.

impl DeclaredVariant for FeasibleRegisterAssignment