pub struct MinimumCodeGenerationUnlimitedRegisters { /* private fields */ }Expand description
Minimum Code Generation with Unlimited Registers.
Given a directed acyclic graph G = (V, A) with maximum out-degree 2, where arcs are partitioned into left (L) and right (R) operand sets, leaves (out-degree 0) are input values each in its own register, internal vertices are 2-address operations (the left operand’s register is overwritten by the result), and roots (in-degree 0) are values to compute, find a program of minimum instructions using OP and LOAD (copy).
§Representation
The configuration is a permutation of internal (non-leaf) vertices
giving their evaluation order. config[i] is the evaluation position
for internal vertex i (0-indexed among internal vertices).
§Example
use problemreductions::models::misc::MinimumCodeGenerationUnlimitedRegisters;
use problemreductions::{Problem, Solver, BruteForce, Min};
// 5 vertices: leaves {3,4}, internal {0,1,2}
// v1 = op(v3, v4), v2 = op(v3, v4), v0 = op(v1, v2)
let problem = MinimumCodeGenerationUnlimitedRegisters::new(
5,
vec![(1,3),(2,3),(0,1)], // left arcs (child destroyed)
vec![(1,4),(2,4),(0,2)], // right arcs (child preserved)
);
let result = BruteForce::new().solve(&problem);
assert_eq!(result, Min(Some(4)));Implementations§
Source§impl MinimumCodeGenerationUnlimitedRegisters
impl MinimumCodeGenerationUnlimitedRegisters
Sourcepub fn new(
num_vertices: usize,
left_arcs: Vec<(usize, usize)>,
right_arcs: Vec<(usize, usize)>,
) -> Self
pub fn new( num_vertices: usize, left_arcs: Vec<(usize, usize)>, right_arcs: Vec<(usize, usize)>, ) -> Self
Create a new instance.
§Arguments
num_vertices- Total number of verticesleft_arcs- Left operand arcs (parent, child); child register is destroyed by OPright_arcs- Right operand arcs (parent, child); child register is preserved
§Panics
Panics if any arc index is out of bounds, if any vertex has out-degree > 2, if left and right arcs for binary vertices are inconsistent, or if a vertex has a self-loop.
Sourcepub fn num_vertices(&self) -> usize
pub fn num_vertices(&self) -> usize
Get the number of vertices.
Sourcepub fn right_arcs(&self) -> &[(usize, usize)]
pub fn right_arcs(&self) -> &[(usize, usize)]
Get the right operand arcs.
Sourcepub fn num_leaves(&self) -> usize
pub fn num_leaves(&self) -> usize
Get the number of leaf vertices (out-degree 0).
Sourcepub fn num_internal(&self) -> usize
pub fn num_internal(&self) -> usize
Get the number of internal (non-leaf) vertices.
Sourcepub fn simulate(&self, config: &[usize]) -> Option<usize>
pub fn simulate(&self, config: &[usize]) -> Option<usize>
Simulate the unlimited-register machine for a given evaluation order
of internal vertices and return the instruction count, or None if
the ordering is invalid (not a permutation or violates dependencies).
With unlimited registers:
- Each leaf starts in its own register
- OP v: computes v, result overwrites the left operand’s register
- LOAD: copies a register value (needed when a left operand is still needed later and would be destroyed)
- Cost = num_OPs + num_LOADs
Trait Implementations§
Source§impl Clone for MinimumCodeGenerationUnlimitedRegisters
impl Clone for MinimumCodeGenerationUnlimitedRegisters
Source§fn clone(&self) -> MinimumCodeGenerationUnlimitedRegisters
fn clone(&self) -> MinimumCodeGenerationUnlimitedRegisters
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read moreSource§impl<'de> Deserialize<'de> for MinimumCodeGenerationUnlimitedRegisters
impl<'de> Deserialize<'de> for MinimumCodeGenerationUnlimitedRegisters
Source§fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
Source§impl Problem for MinimumCodeGenerationUnlimitedRegisters
impl Problem for MinimumCodeGenerationUnlimitedRegisters
Source§const NAME: &'static str = "MinimumCodeGenerationUnlimitedRegisters"
const NAME: &'static str = "MinimumCodeGenerationUnlimitedRegisters"
Source§fn variant() -> Vec<(&'static str, &'static str)>
fn variant() -> Vec<(&'static str, &'static str)>
Source§fn dims(&self) -> Vec<usize>
fn dims(&self) -> Vec<usize>
Source§fn num_variables(&self) -> usize
fn num_variables(&self) -> usize
Source§fn problem_type() -> ProblemType
fn problem_type() -> ProblemType
impl DeclaredVariant for MinimumCodeGenerationUnlimitedRegisters
Auto Trait Implementations§
impl Freeze for MinimumCodeGenerationUnlimitedRegisters
impl RefUnwindSafe for MinimumCodeGenerationUnlimitedRegisters
impl Send for MinimumCodeGenerationUnlimitedRegisters
impl Sync for MinimumCodeGenerationUnlimitedRegisters
impl Unpin for MinimumCodeGenerationUnlimitedRegisters
impl UnsafeUnpin for MinimumCodeGenerationUnlimitedRegisters
impl UnwindSafe for MinimumCodeGenerationUnlimitedRegisters
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